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LJPEG-D Lossless JPEG Decoder Core

The LJPEG-D core decodes Lossless JPEG (LJPEG) images in a compact, high-performance, stand-alone package ideal for applications where bit-by-bit accurate reproduction of an image is essential.

The LJPEG-D processes images that conform to the spatial (sequential) lossless encoding mode (SOF3) of the ISO/IEC 10918-1 standard (CCITT T81 recommendation). LJPEG employs a predictor function rather than the Discrete Cosine Transform (DCT) functions used for lossy JPEG compression, which can introduce round-off errors. The LJPEG-D core can thus decode images that have no information loss, and requires a significantly smaller physical implementation than necessary for lossy image decoding.

Evaluation designs show that the core requires only 32K gates in an ASIC (typical 0.18μ process) and that it fits in a variety of low-cost FPGA devices. Its heavily optimized architecture also enables very high performance, reaching 200 MSamples/sec.

The LJPEG-D is a fully synchronous, strictly positive-edge design with no internal three-state buffers. Comprehensive documentation and a complete verification environment—including a bit-accurate model—help designers integrate and verify the core.

Features

Conforms to the spatial (sequential) lossless encoding mode (SOF3) of the ISO/IEC 10918-1 standard (CCITT T81 recommendation).
Standalone operation.
- ISO/IEC 10918-1 JPEG stream input.
- Decoded pixel output.
Self-programmable through the standard JPEG markers.
- Programmable image dimensions.
- Up to four stream-programmable Huffman tables.
- Programmable restart interval.
- Programmable point transform function.
- Header error catch-up features.
Compact, high-performance architecture.
- 66K gates achieving 200 MSamples/sec (0.18μ ASIC)
- Also fits inexpensive FPGAs (see FPGA version datasheets)
Robust and simple to use
- General purpose, fully stallable I/O interfaces.

Limitations with respect to the ISO/IEC 10918-1 standard:

Up to three image-components are supported (Nf field of the SOF3 marker segment = 1 or 2 or 3).
Single scan encoding (only one SOS marker segment, with Ns field = Nf).
No DNL marker insertion (Y field of the SOF3 marker segment > 0).
Fixed parameters.
- Supported sample precision is fixed to 16 bits (P field of the SOF3 marker segment = 16).
- No sub-sampling (Hi and Vi fields of the SOF3 marker segment = 1).
- Prediction function is fixed to the left-hand predictor, predictor 1. (Ss field of SOS marker segment = 1).

Applications

The LJPEG-D provides a fast, economical solution whenever lossless image compression is essential, including applications such as:

Medical, military, and space imaging.
Professional, studio-quality cameras and editing suites.
High-end film and photo scanners.
Industrial machine vision systems.

Block Diagram

LJPEG-D Block Diagram

Functional Description

Lossless JPEG was added to the ITU-T JPEG recommendations in 1995. The JPEG lossless mode of operation does not use the 2D-DCT that is used in the lossy mode, since round-off errors prevent a 2D-DCT calculation from being lossless. For the same reason, one would not normally use color space conversion or downsampling, although these are permitted by the standard.

The lossless mode of the standard codes the difference between each pixel and the "predicted" value for the pixel. The predicted value is a function of the already-transmitted pixels just above and to the left of the current one (8 different predictor functions are defined in the standard). The sequence of the calculated differences (prediction errors) is encoded using the same back end (Huffman or arithmetic) used in the lossy mode.

The LJPEG-D receives an ISO/IEC 10918-1 compatible lossless JPEG stream via the JPEG-In Interface. The core is capable of decoding compressed images with up to three components, having 16-bits precision per component sample, previously encoded using the predictor 1 function and the Huffman coding back end.

While the LJPEG-D reads the JPEG stream, it parses the marker segments and programs itself accordingly. The programmable parameters the core can extract from the stream include the image dimensions, the Huffman tables, the restart interval if any, and the point transform function. During the parsing phase of the JPEG markers, the core enables a header error catch-up function so that corrupted streams can be detected. After parsing the marker segments, the core decompresses the entropy coded segment(s) of the lossless JPEG stream, and outputs image samples via the pixel-out interface.

Implementation Results

The LJPEG-D core has been evaluated in a variety of technologies and devices. Synthesis results targeting indicative 0.18u ASIC processes and using balanced area/speed constraints show that the LJPEG-D requires just 66K gates (excluding internal memories) and runs at 200MHz, processing 200 MSamples/second.

Support

The core as delivered is warranted against defects for three years from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.

Verification

The core has been verified through extensive simulation using a large set of test vectors and reference results, and through rigorous code coverage measurements.

Deliverables

The core is available in ASIC (synthesizable HDL) and FPGA (netlist) forms, and includes everything required for successful implementation:

HDL RTL source code (ASICs) or post-synthesis EDIF netlist (FPGAs)
A bit-accurate model (BAM) including custom vector generation support, and a software library of the bit accurate model functions
Sophisticated HDL Testbench including external FIFOs, buffers, models of interfaces, and the core
An RTL simulation model
Simulation script, vectors, expected results, and comparison utility
Synthesis script (ASICs) or place and route script (FPGAs)
Comprehensive user documentation, including detailed specifications and a system integration guide

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