The AES core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit blocks, and is programmable for 128-, 192-, and 256-bit key lengths.
Different versions provide the best speed/area results for specific applications. Various cypher modes are supported (ECB, CBC, OFB, CFB, CTR), different datapath widths are possible, and smaller or faster architectures are available. The core works with a pre-expanded key, or with optional key expansion logic.
The fully synchronous design is available in source or netlist forms.
Features
Encrypts and decrypts using the AES Rijndael Block Cipher Algorithm
Satisfies Federal Information Processing Standard (FIPS) Publication 197 from the US National Institute of Standards and Technology (NIST)
Processes 128-bit data in 128-bit blocks
Employs user-programmable key size of 128, 192 or 256 bits
Works with a pre-expended key or can integrate the optional key expansion function
Simple, fully synchronous, reusable design
Available as fully functional and synthesizable VHDL or Verilog, or as a netlist for popular programmable devices
Complete deliverables include test benches
Applications
Protected network routers
Electronic financial transactions
Secure wireless communications
Secure video surveillance systems
Encrypted data storage
Block Diagram
Implementation Results
AES128-P reference designs have been evaluated in a variety of technologies.
A 32-bit version named AES32-M is also available. AES32-M reference designs have been evaluated in a variety of technologies.
Export Permits
This core is approved for export to Australia and the United States for military applications, and to all other countries for non-military applications, except for the following:
Cuba
Iran
Iraq
Libya
North Korea
Sudan
Syria
It is the customer’s responsibility to check with relevant authorities regarding the re-export of equipment containing the AES128-P technology.
